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ISSPIT 2014 Keynote Speaker



Professor Sanjay Ranka, University of Florida

Parallel Algorithms and Software for Synthetic Aperture Radar on Modern Architectures


Parallel Algorithms and Software for Synthetic Aperture Radar on Modern Architectures For many remote sensing applications, images are constructed using Synthetic Aperture Radar (SAR). SAR collects information about a scene by repeatedly collecting the response from pulses transmitted toward an area of interest. A Backprojection algorithm is used to construct high quality 2-dimensional images from SAR data. Backprojection is an O(N3) algorithm that requires tens of Teraflops for realistic image sizes. In this talk, we will present novel sequential and parallel algorithms for computing SAR that on a mix of GPUs and CPUs. We will also present a software framework that encapsulates these algorithms. The key challenges that our work addresses include intelligent task-core mapping; and minimization of communication and synchronization cost. We will present performance results on a variety of systems and possible applications to change detection. .

Joint work with Prof. K. Slavakis, Dr Y. Kopsinis, Dr S. Chouvardas

Sanjay Ranka, Ph. D. is a Professor in the Department of Computer Science. His current research interests are data mining, informatics and grid computing for data intensive applications in High Energy Physics, BioTerrorism and BioMedical Computing. Most recently he was the Chief Technology Officer at Paramark where he developed real-time optimization software for optimizing marketing campaigns. Sanjay has also held positions as a tenured faculty positions at Syracuse University and as a researcher/visitor at IBM T.J. Watson Research Labs and Hitachi America Limited. Sanjay earned his Ph.D. (Computer Science) from the University of Minnesota in 1988 and a B. Tech. in Computer Science from IIT, Kanpur, India in 1985. He has coauthored two books: Elements of Neural Networks (MIT Press) and Hypercube Algorithms (Springer Verlag), 50+ journal articles and 80+ refereed conference articles. He serves on the editorial board of the Journal of Parallel and Distributed Computing and was a past member of the Parallel Compiler Runtime Consortium and the Message Passing Initiative Standards Committee. He was one of the main architects of the Syracuse Fortran 90D/HPF compiler. He is a fellow of the IEEE and AAAS, advisory board member of IEEE Technical Committee on Parallel Processing and a member of IFIP Committee on System Modeling and Optimization.